4#include <boost/program_options.hpp>
8namespace po = boost::program_options;
12 , fMapFileName(MapFileName)
15 LOG(info) <<
"Loading SILICON Map from FILE: Period " << period <<
", Run " <<
run <<
"...";
22 Int_t kNStations = fSilStationSet->GetNStations();
25 for (Int_t iSt = 0; iSt < kNStations; ++iSt) {
26 auto* st = fSilStationSet->GetStation(iSt);
27 Int_t kNModules = st->GetNModules();
28 fSigProf[iSt] =
new TH1F**[kNModules];
30 for (Int_t iMod = 0; iMod < kNModules; ++iMod) {
31 auto* mod = st->GetModule(iMod);
33 fSigProf[iSt][iMod] =
new TH1F*[kNLayers];
35 for (Int_t iLay = 0; iLay < kNLayers; ++iLay) {
50 LOGF(debug,
"Station: %d, Module: %2d, PseudoLayer: %2d, Strips: %3d", iSt, iMod, iLay,
56 histName.Form(
"%s_%d_%d_%d",
fDetName.Data(), iSt, iMod, iLay);
57 fSigProf[iSt][iMod][iLay] =
new TH1F(histName, histName, kNStrips, 0, kNStrips);
58 fSigProf[iSt][iMod][iLay]->SetDirectory(0);
73 Int_t kNStations = fSilStationSet->GetNStations();
74 for (Int_t iSt = 0; iSt < kNStations; ++iSt) {
75 auto* st = fSilStationSet->GetStation(iSt);
76 Int_t kNModules = st->GetNModules();
77 for (Int_t iMod = 0; iMod < kNModules; ++iMod) {
80 for (Int_t iLay = 0; iLay < kNLayers; ++iLay) {
94 for (
auto& it : fOuterMap)
95 for (
auto& inner : it.second)
99BmnStatus BmnSiliconRaw2Digit::ReadMapFile()
109 vector<string> channel_map;
110 vector<string> spec_thr;
111 Double_t final_thr = 0;
112 Double_t thr_dif = 0;
114 Double_t cmod_cut = 0;
117 po::options_description desc(
"Options");
118 desc.add_options()(
"CHANNEL_MAP.channels", po::value<vector<string>>(&channel_map)->multitoken(),
119 "ADC channel -> strip map")(
"SIGNAL_CONFIGURATION.spec_thr",
120 po::value<vector<string>>(&spec_thr)->multitoken(),
121 "ADC channel -> strip map")(
122 "SIGNAL_CONFIGURATION.Threshold", po::value<Double_t>(&final_thr)->default_value(150),
"ADC final threshold")(
123 "SIGNAL_CONFIGURATION.ThresholdDif", po::value<Double_t>(&thr_dif)->default_value(100),
"ADC threshold step")(
124 "SIGNAL_CONFIGURATION.NIterations", po::value<Int_t>(&n_iters)->default_value(6),
"ADC filter iterations")(
125 "SIGNAL_CONFIGURATION.CModCut", po::value<Double_t>(&cmod_cut)->default_value(100),
"ADC CModCut");
128 po::variables_map vm;
129 TString name = TString(getenv(
"VMCWORKDIR")) + TString(
"/input/") + fMapFileName;
130 ifstream config_file(name.Data(), ifstream::in);
131 if (!config_file.is_open()) {
132 LOG(error) <<
"Error opening map-file (" << name <<
")!";
135 po::store(po::parse_config_file(config_file, desc), vm);
145 for (
auto& str : spec_thr) {
146 istringstream ss(str);
147 ss >> std::hex >> ser >> std::dec >> ch >>
thr;
149 LOGF(debug,
"Serial 0x%08X Channel %2d Threshold %3.3f", ser, ch,
thr);
153 for (
auto& str : channel_map) {
154 istringstream ss(str);
155 ss >> std::hex >> ser >> std::dec >> ch_lo >> ch_hi >> mod_adc >> mod >> lay >> station;
159 record->module = mod;
169 fMap.push_back(record);
170 auto it = fOuterMap.find(ser);
171 if (it == fOuterMap.end()) {
173 inner.insert(make_pair(record->
channel_low - 1,
nullptr));
175 fOuterMap.insert(make_pair(ser, move(inner)));
179 auto innerItLo = inner.find(record->
channel_low - 1);
180 if (innerItHi == inner.end()) {
183 if (innerItHi->second ==
nullptr) {
184 inner.erase(innerItHi);
187 fprintf(stderr,
"Wrong %s map! Overlapping intervals for %08X!\n",
fDetName.Data(), ser);
191 if (innerItLo == inner.end()) {
192 inner.insert(make_pair(record->
channel_low - 1,
nullptr));
207 ProcessAdc(digits, kFALSE);
219 ProcessAdc(
nullptr, kTRUE);
230 LOGF(info,
"Searching Noisy Channels in Silicon Strip Detectors");
231 LOGF(info,
"Window size: %3d, Threshold: %.2f, Correction: %3d", kNStripsInBunch, kNThresh,
232 (
int)round(correction));
236 if (it == fOuterMap.end())
240 auto innerIt = inner.lower_bound(iCh);
241 if (innerIt == inner.end())
246 for (Short_t iSmpl = 0; iSmpl <
GetNSamples(); ++iSmpl) {
248 Int_t iStrip =
MapStrip(rec, iCh, iSmpl);
272 for (Int_t iSt = 0; iSt < fSilStationSet->GetNStations(); ++iSt) {
273 auto* st = fSilStationSet->GetStation(iSt);
274 for (Int_t iMod = 0; iMod < st->GetNModules(); ++iMod) {
275 auto* mod = st->GetModule(iMod);
276 for (Int_t iLay = 0; iLay < 2 ; ++iLay) {
280 TH1F* prof =
fSigProf[iSt][iMod][iLay];
294 bool newNoisyChannels =
true;
295 while (newNoisyChannels) {
298 newNoisyChannels =
false;
300 vector<int> noisyChannels;
301 for (Int_t iStrip = 0; iStrip < kNStripsInBunch; ++iStrip) {
302 Int_t strip = iStrip;
305 Double_t curr = prof->GetBinContent(strip + 1);
318 Double_t curr = prof->GetBinContent(strip + 1);
319 if (curr > 0 && properStrips > 0) {
320 if (properStrips == 1
321 || (kNThresh * (sum - curr) / (properStrips - 1) < curr - correction))
323 LOGF(debug2,
"profile noise on iSt %d iMod %d iLay %d strip %d", iSt, iMod, iLay,
326 newNoisyChannels =
true;
327 noisyChannels.push_back(strip);
332 if (strip >= (kNStripsInBunch - 1) / 2
335 if ((
fNoisyChannels[iSt][iMod][iLay][strip - (kNStripsInBunch - 1) / 2] == kFALSE)) {
336 sum -= prof->GetBinContent(strip - (kNStripsInBunch - 1) / 2
338 if (prof->GetBinContent(strip - (kNStripsInBunch - 1) / 2 + 1) > 0)
344 if ((
fNoisyChannels[iSt][iMod][iLay][strip + (kNStripsInBunch / 2) + 1] == kFALSE)) {
345 sum += prof->GetBinContent(strip + (kNStripsInBunch / 2) + 1
347 if (prof->GetBinContent(strip + (kNStripsInBunch / 2) + 1 + 1) > 0)
354 for (
auto strip : noisyChannels) {
356 for (
auto& it : fMap)
357 if (it->station == iSt && it->module == iMod && it->layer == iLay) {
359 for (iCr = 0; iCr <
GetSerials().size(); iCr++) {
363 UInt_t iCh = it->inverted ? (it->channel_high - strip /
GetNSamples())
377 if (it == fOuterMap.end())
381 auto innerIt = inner.lower_bound(iCh);
382 if (innerIt == inner.end())
387 for (Short_t iSmpl = 0; iSmpl <
GetNSamples(); ++iSmpl) {
388 Int_t iStrip =
MapStrip(rec, iCh, iSmpl);
398void BmnSiliconRaw2Digit::ProcessAdc(TClonesArray* digs, Bool_t doFill)
402 if (it == fOuterMap.end())
405 auto innerIt = it->second.lower_bound(iCh);
406 if (innerIt == it->second.end())
415 SpecThr = itThr->second;
417 Short_t station = rec->
station;
418 Short_t
module = rec->module;
419 Short_t layer = rec->
layer;
422 for (Short_t iSmpl = 0; iSmpl <
GetNSamples(); ++iSmpl) {
425 Int_t strip =
MapStrip(rec, iCh, iSmpl);
428 Double_t sig =
fAdc[iCr][iCh][iSmpl] -
fPedVal[iCr][iCh][iSmpl] + cs;
443 fSigProf[station][module][layer]->Fill(strip);
int MapStrip(size_t &iChar, size_t &iCh)
map< PlMapKey, Double_t > fSpecThreshMap
Double_t *** GetPedestalsRMS()
void CalcEventMods_simd()
vector< UInt_t > & GetSerials()
void SetThreshold(Double_t final_thr, Double_t thr_dif=-1, Double_t n_iters=-1, Double_t cmod_cut=-1)
Bool_t **** fNoisyChannels
void GrabSerialsFromMap(unordered_map< UInt_t, cl > m)
Bool_t *** GetNoisyChipChannels()
void(BmnAdcProcessor::* PrecalcEventModsImp)(TClonesArray *adc)
static double correctionSil
Int_t GetLastStripNumber()
BmnStatus FillProfiles(TClonesArray *adc)
BmnStatus FillEvent(TClonesArray *adc, TClonesArray *sts)
virtual ~BmnSiliconRaw2Digit()
BmnStatus FillNoisyChannels()
BmnSiliconRaw2Digit(Int_t period, Int_t run, TString MapFileName, BmnSetup bmnSetup=kBMNSETUP)
static unique_ptr< BmnSiliconStationSet > Create(Int_t period, Int_t stp=0)
void SetIsGoodDigit(Bool_t tmp)
map< Int_t, BmnSiliconMapping * > InChanMapSil
map< Int_t, BmnSiliconMapping * > InChanMapSil
Short_t Short_t channel_low